By the end of this chapter you'll be able to…

  • 1Quote rectifier figures of merit and size a bias circuit
  • 2Compute BJT small-signal gain and understand the Miller effect
  • 3Predict the effect of each feedback topology on impedances
  • 4Analyse op-amp circuits and compute oscillator frequency and amplifier efficiency
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Why this chapter matters in UPSC ESE (IES)
Analog questions are short and numerical. A card of rectifier figures, op-amp gains, oscillator frequencies and amplifier-class efficiencies covers a large share of the marks.

Analog Electronics, Amplifiers and Operational Amplifiers — ESE E&T

Weightage: Analog electronics is the first large block of the Electronics and Telecommunication papers. Questions are short and numerical: rectifier figures, transistor gain, op-amp configurations, oscillator frequency and amplifier efficiency, so a set of reference results answers most of them.

1. Diodes and rectifiers

The ideal diode equation is , where the thermal voltage mV at room temperature. A silicon diode drops about 0.7 V when conducting, and germanium about 0.3 V. The forward voltage falls by about 2 mV per degree rise in temperature.

A Zener diode works in reverse breakdown and holds a nearly constant voltage, serving as a simple regulator.

Rectifier figures to remember:

QuantityHalf-waveFull-wave
Average (DC) output
RMS output
Ripple factor1.210.482
Maximum efficiency40.6 percent81.2 percent
Peak inverse voltage (centre-tap), (bridge)

A capacitor filter smooths the output, with ripple falling as the capacitance and load resistance rise.

2. BJT operation and biasing

A bipolar transistor has three regions: cut-off (both junctions reverse biased), active (base-emitter forward, base-collector reverse) and saturation (both forward). In the active region, and . As an amplifier the BJT must stay in the active region, and as a switch it moves between cut-off and saturation.

The voltage-divider bias circuit fixes the base voltage with a resistor chain and stabilises the operating point against changes in and temperature. A better design makes the divider current much larger than the base current. The stability factor is lowest, and so best, for this bias.

Thermal runaway arises when rising current heats the junction, which raises the current further. An emitter resistor provides negative feedback that prevents it.

3. Small-signal analysis

In the hybrid- model, the transconductance is and the input resistance is .

Worked example. At mA, mS. A common-emitter stage with has a voltage gain , with the minus sign showing a 180-degree phase inversion.

The three BJT configurations differ:

ConfigurationVoltage gainInput resistanceOutput resistanceUse
Common emitterHigh, invertingMediumMedium to highGeneral amplifier
Common collector (follower)About 1HighLowBuffer
Common baseHigh, non-invertingLowHighHigh-frequency amplifier

The bandwidth of an amplifier is limited by internal capacitances. The Miller effect multiplies the base-collector capacitance by at the input, and so reduces the upper cut-off frequency of a common-emitter stage.

4. MOSFETs

An enhancement MOSFET conducts when exceeds the threshold . In saturation (the amplifier region), and the transconductance is . In the triode region it acts as a voltage-controlled resistor. MOSFETs have a very high input resistance and are the basis of CMOS logic.

5. Feedback

With open-loop gain and feedback fraction , the closed-loop gain is:

Negative feedback reduces gain by the factor but improves stability, widens bandwidth, reduces distortion and noise, and changes impedances. The four topologies:

TopologySamplesMixesInput impedanceOutput impedance
Series-shuntVoltageSeriesRaisedLowered
Series-seriesCurrentSeriesRaisedRaised
Shunt-shuntVoltageShuntLoweredLowered
Shunt-seriesCurrentShuntLoweredRaised

The rule: series mixing raises input impedance, shunt mixing lowers it, voltage sampling lowers output impedance and current sampling raises it.

6. Operational amplifiers

An ideal op-amp has infinite gain, infinite input resistance and zero output resistance. With negative feedback two rules hold: no current flows into the inputs and the inputs sit at the same voltage (the virtual short).

CircuitGain or output
Inverting
Non-inverting
Voltage follower1
Summing
Integrator
Differentiator

Real limits matter. Common-mode rejection ratio (CMRR) compares differential gain with common-mode gain. Slew rate is the maximum rate of output voltage change, and the largest undistorted sine amplitude at frequency requires . The gain-bandwidth product is constant for a voltage-feedback op-amp, so a closed-loop gain of 11 with a 1 MHz GBW gives a bandwidth of about kHz.

A comparator uses no feedback and switches between supply rails. A Schmitt trigger adds positive feedback to create hysteresis and reject noise. An instrumentation amplifier gives high input resistance and high CMRR, which suits sensor signals.

7. Oscillators

The Barkhausen criterion says that sustained oscillation needs a loop gain of unity () and a total loop phase shift of or degrees.

  • RC phase-shift: three RC sections each give 60 degrees, and with a required gain of at least 29.
  • Wien bridge: and the amplifier gain must be 3.
  • Colpitts and Hartley: LC tanks for radio frequency, with .
  • Crystal: very stable frequency from a quartz resonator.

Worked example. A Wien bridge with and nF oscillates at Hz.

A 555 timer in astable mode produces a rectangular wave with .

8. Power amplifiers

ClassConductionMaximum efficiency
AFull cycle25 percent (series-fed), 50 percent (transformer-coupled)
BHalf cycle78.5 percent
ABSlightly over halfBetween A and B, removes crossover distortion
CLess than halfAbove 78.5 percent, used in tuned RF stages

Push-pull class B stages cancel even harmonics, but they suffer crossover distortion, which a small bias (class AB) removes.

Common traps

  • Reading Miller effect as lowering input capacitance. It raises it.
  • Mixing feedback impedance rules. Series mixing raises, shunt lowers.
  • Using the gain-bandwidth product for a fixed closed-loop bandwidth. It trades gain for bandwidth.
  • Using full-wave formulas for a half-wave rectifier.
  • Forgetting the minus sign in an inverting amplifier.

Memory aids

  • "Series raises, shunt lowers": feedback input impedance.
  • "25, 50, 78.5": power amplifier efficiencies.
  • "Gain times bandwidth is fixed": op-amp.

Summary

Diodes and rectifiers are described by average value, ripple and PIV, and BJTs and MOSFETs by their biasing and transconductance. Feedback trades gain for stability, with impedances set by the topology.

Op-amp circuits follow the virtual-short rule, with real limits of slew rate and gain-bandwidth. Oscillators need the Barkhausen condition, and amplifier classes trade linearity for efficiency.

Exam protocol

  • Identify the configuration before choosing the gain formula.
  • State the virtual-short assumption in every op-amp answer.
  • Check slew rate and bandwidth limits at high frequency.
  • Name the feedback topology before reading its effect on impedance.

Key formulas & results

Everything to memorise for the exam hall, in one card. Screenshot this for revision.

Transconductance
VT is about 26 mV at room temperature.
Feedback gain
Negative feedback.
Slew rate limit
For an undistorted sine output.
Wien bridge oscillator
Amplifier gain of 3.
Non-inverting amplifier
Inverting gain is minus Rf over Rin.
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Traps UPSC ESE (IES) sets — and how to dodge them

These are the exact option-traps and misreads that cost marks under negative marking.

WATCH OUT
✗ Treating the Miller effect as lowering input capacitance.
✓ It multiplies the feedback capacitance by one plus the gain magnitude.
WATCH OUT
✗ Mixing feedback impedance rules.
✓ Series mixing raises input impedance; shunt mixing lowers it.
WATCH OUT
✗ Expecting a fixed closed-loop bandwidth from an op-amp.
✓ Gain times bandwidth is constant.
WATCH OUT
✗ Using full-wave rectifier figures for a half-wave circuit.
✓ Half-wave: ripple 1.21, efficiency 40.6 percent.
WATCH OUT
✗ Dropping the minus sign in an inverting amplifier.
✓ The output is 180 degrees out of phase.

Exam-pattern practice

PYQ-style questions with full solutions. Work through them as a readiness check — mark yourself honestly and get your gap report at the end.

Readiness check

Are you exam-ready for Analog Electronics, Amplifiers and Operational Amplifiers?

8 problems from this chapter. Try each one, reveal the worked solution, mark yourself honestly — get your gap report at the end.

8 questions~6 min

5-minute revision

The whole chapter, distilled. Read this the night before the exam.

  • •Thermal voltage about 26 mV; silicon drop about 0.7 V.
  • •Half-wave: Vm/pi, ripple 1.21, 40.6 percent; full-wave: 2Vm/pi, 0.482, 81.2 percent.
  • •BJT active region for amplification; voltage-divider bias is most stable.
  • •gm = IC/VT; CE gain = -gm RC; Miller multiplies Cbc by (1 + |Av|).
  • •Series mixing raises Zin; voltage sampling lowers Zout.
  • •Op-amp virtual short; GBW constant; SR at least 2 pi f Vp.
  • •Barkhausen: loop gain 1 and phase 0 or 360 degrees; efficiencies 25, 50, 78.5.

UPSC ESE (IES) question blueprint

How this topic is asked, tier by tier — so you can prep to the pattern.

Typical weightage: 50

Question styleMarks eachTypical countWhat it tests
Rectifier~2-4 marks in a typical paper
Op-amp~2-4 marks in a typical paper
BJT gain~4-6 marks in a typical paper
Bandwidth~4-6 marks in a typical paper
Oscillator~4-6 marks in a typical paper
Slew rate~6-8 marks in a typical paper
Feedback~6-8 marks in a typical paper
Power amplifier~2-4 marks in a typical paper
Prep strategy
  • Values card
  • Virtual short
  • Name the topology

Exam-hall strategy

Battle-tested tips from mentors and toppers for this topic under the sectional clock.

  1. Keep a card of rectifier and amplifier-class values.
  2. Apply the virtual short to every op-amp circuit.
  3. Name the feedback topology first.

Beyond the exam

Where this skill shows up in the job you're competing for — and in life.

Sensor and audio front ends

Instrumentation amplifiers and active filters condition sensor and audio signals.

Power supplies

Rectifier, filter and Zener or regulator stages convert mains to regulated DC.

Where else this topic is tested

Prepare once, score in every exam that asks it.

ESE E&T Prelims Paper IIAnalog electronics
GATE Electronics and CommunicationAnalog circuits section

Questions aspirants ask

Pulled from the Q&A community and mentor sessions.

Know the MOSFET regions and the saturation current expression; CMOS logic is in the digital chapter.

Wien bridge, RC phase-shift and LC (Colpitts, Hartley) formulas are the standard set.
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